About OTC CatchUp

Note OTC CatchUps are weekly informal sessions involving project showcases and technical discussions. They are held every Saturday from 10:30 PM IST. Join in!.
For all summaries, please visit catchup.ourtech.community/summary.

OTC CatchUp #174

Date: 09-03-2024

Duration: 2 hrs 50 mins

Topics Discussed

  • General Introduction

  • Bhavesh Kukreja talked about Scratch and a simple visual application that he built as a part of CS 50.

  • Ramyak Mehra and Darshan Rander had a contention about a beginner using Rust or C for development.

    • C teaches you about memory management whereas Rust abstracts it away and from the POV of a beginner, they won’t be able to learn things without actually experimenting.

    • Ramyak Mehra mentioned that Rust gives warnings and directions to the developer while compiling whereas C doesn’t.

    • jaden furtado tried to pitch in with a new perspective by talking about the intent behind learning a language and how it should be based on the problem that the developer wants to solve.

  • Building on the previous discussion, Harsh Kapadia shared an example of structure packing and caching.

  • We talked about the recent Linux kernel patch that improved the TCP performance by 40% as discussed in this youtube video: Google Patches Linux kernel with 40% TCP performance.

  • Harsh Kapadia shared a few links:

  • Anil Harwani and jaden furtado had a discussion about the paper: Creating Trust by Abolishing Hierarchies.

    • Anil Harwani mentioned SNP (Secure Nested Paging) and how it’s a hardware feature that’s being used to secure the hypervisor.

  • Pranav Dani and Anil Harwani talked about The Multikernel: A new OS architecture for scalable multicore systems.

    • The paper talks about using message passing between cores and how it’s a better approach than shared memory/cache coherency.

    • Anil Harwani said that the thing about research is that the ideas are good but one needs to evaluate them in the real world and suggest how much performance can improve, which is the main reason behind why most chip makers stick to cache coherency.

  • Rishit Dagli and Anil Harwani talked about formal verification and how it’s used to verify the correctness of a program.

    • There’s nothing like fully secure programs and the best that we can do is to make it as secure as possible.

    • Securing something should be less than 10% of the cost of the thing that’s being secured.

  • Pranav Dani talked about Cache Hierarchy, set associative cache, and how it’s used to reduce the latency of memory access.

    • L1 cache is parallel and L2 cache is serial, which is why L1 cache is faster than L2 cache due to more cycles required for accessing requisite data.

    • He also talked about the TLB (Translation Lookaside Buffer) and how it’s used to reduce the latency of page table access.

    • We also talked about speculative execution, branch prediction and potential pitfalls.

    • We discussed Linearizability, Sequential Consistency, and how they’re used to reason about concurrent programs.

      • We also discussed how Serializability and sequential consistency are different. Some database terminologies are also used to reason about concurrent programs.


  1. Bhavesh Kukreja

  2. Darshan Rander

  3. Darshit Suratwala

  4. Harsh Kapadia

  5. Kaustubh Khavnekar

  6. Kedar Karbele

  7. Mohit Gangwani

  8. Pranav Dani

  9. Ramyak Mehra

  10. Rishit Dagli

  11. Saifuddin Saifee

  12. Swapnil Borkar

  13. Viranchee L

  14. Wilfred Almeida

  15. jaden furtado

  16. Adithyan

  17. Akhil Sahu

  18. Anil Harwani

  19. Atharva Jadhav

  20. AtharvaJ

  21. Gauri Khanolkar

  22. Jash Malhotra

  23. Kartik Patel

  24. Krishana Dave

  25. Raghav Rathi

  26. Rishi Setpal

  27. Vishal Dubey

Meet Screenshot

Meet #174 screenshot

Note For all summaries, please visit catchup.ourtech.community/summary.

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