OTC CatchUp #174 Summary

Ramyak Mehra mentioned that he built his first app using App Inventor.

C teaches you about memory management whereas Rust abstracts it away and from the POV of a beginner, they won’t be able to learn things without actually experimenting.

Ramyak Mehra mentioned that Rust gives warnings and directions to the developer while compiling whereas C doesn’t.

jaden furtado tried to pitch in with a new perspective by talking about the intent behind learning a language and how it should be based on the problem that the developer wants to solve.

Structure Packing and Caching example.

Gallery of Processor Cache Effects.

Google Patches Linux kernel with 40% TCP performance.

VS Code without Microsoft telemetry.

Adoc.

Modbus.

Putting the 'You' in CPU.

The Missing Semester of your CS Education.

CS 50.

Anil Harwani mentioned SNP (Secure Nested Paging) and how it’s a hardware feature that’s being used to secure the hypervisor.

The paper talks about using message passing between cores and how it’s a better approach than shared memory/cache coherency.

Anil Harwani said that the thing about research is that the ideas are good but one needs to evaluate them in the real world and suggest how much performance can improve, which is the main reason behind why most chip makers stick to cache coherency.

There’s nothing like fully secure programs and the best that we can do is to make it as secure as possible.

Securing something should be less than 10% of the cost of the thing that’s being secured.

L1 cache is parallel and L2 cache is serial, which is why L1 cache is faster than L2 cache due to more cycles required for accessing requisite data.

He also talked about the TLB (Translation Lookaside Buffer) and how it’s used to reduce the latency of page table access.

We also talked about speculative execution, branch prediction and potential pitfalls.

We discussed Linearizability, Sequential Consistency, and how they’re used to reason about concurrent programs.